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? 2003 microchip technology inc. preliminary ds21790a-page 1 m MCP2140 features ? implements the irda ? standard, including: -irlap -irlmp -ias -tinytp - ircomm (9-wire ?cooked? service class) ? provides irda standard physical signal layer support including: - bidirectional communication - crc implementation - fixed data communication rate of 9600 baud ? includes uart-to-irda standard encoder/ decoder functionality: - easily interfaces with industry standard uarts and infrared transceivers ? uart interface for connecting to data communications equipment (dce) or data terminal equipment (dte) systems ? transmit/receive formats (bit width) supported: -1.63s ? hardware uart support: - 9.6 kbaud baud rate - 29 byte data buffer size ? infrared supported: - 9.6 kbaud baud rate - 64 byte data packet size ? operates as secondary device ? automatic low power mode - < 60 a when no ir activity present (phact = l) cmos technology ? low power, high-speed cmos technology ? fully static design ? low voltage operation ? industrial temperature range ? low power consumption - < 1 ma @ 3.0v, 7.3728 mhz (typical) package types block diagram 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 1 19 18 16 15 14 13 12 11 17 18 17 15 14 13 12 11 10 16 20 osc2 osc1/clki v ss v ss v dd v dd rxpd cd cts rts tx rx ri dsr dtr txir phact reset nc rxpdref v ss tx rx ri txir phact reset nc rxpdref osc2 osc1/clki v dd rxpd cd cts rts dsr dtr MCP2140 MCP2140 pdip, soic ssop encode and protocol tx txir rx rxpd MCP2140 baud rts generator cd cts dsr dtr ri osc1 osc2 protocol handler and decode rxpdref handler + - phact logic rate uart control irda ? standard protocol stack controller with fixed 9600 baud communication rate
MCP2140 ds21790a-page 2 preliminary ? 2003 microchip technology inc. MCP2140 system block diagram decode encode tx txir rx i/o MCP2140 picmicro ? so si uart baud rate generator uart control logic rxpd rxpdref + - ir led ir receive detect circuitry ir photo diode rts cts dsr dtr cd ri phact uart flow i/o i/o i/o i/o i/o i/o control (1) MCP2140 status (1) note 1: not all microcontroller i/o pins are required to be connected to the MCP2140. microcontroller
? 2003 microchip technology inc. preliminary ds21790a-page 3 MCP2140 1.0 device overview the MCP2140 is a cost-effective, low pin count (18-pin), easy-to-use device for implementing irda standard wireless connectivity. the MCP2140 provides support for the irda standard protocol ?stack?, bit encoding/ decoding and low cost, discrete ir receiver circuitry. the serial and ir interface baud rates are fixed at 9600 baud. the serial interface and ir interface baud rates are dependent on the device frequency, but irda standard operation requires a device frequency of 7.3728 mhz. the MCP2140 will specify to the primary device the ir baud rate during the discover phase. the MCP2140 can operate in data communication equipment (dce) and data terminal equipment (dte) applications, and sits between a uart and an infrared optical transceiver. the MCP2140 encodes an asynchronous serial data stream, converting each data bit to the corresponding infrared (ir) formatted pulse. ir pulses received are decoded and then handled by the protocol handler state machine. the protocol handler sends the appro- priate data bytes to the host controller in uart- formatted serial data. the MCP2140 supports ?point-to-point? applications, that is, one primary device and one secondary device. the MCP2140 operates as a secondary device and does not support ?multi-point? applications. sending data using ir light requires some hardware and the use of specialized communication protocols. these protocol and hardware requirements are described, in detail, by the irda standard specifications. the encoding/decoding functionality of the MCP2140 is designed to be compatible with the physical layer com- ponent of the irda standard. this part of the standard is often referred to as ?irphy?. the complete irda standard specification is available for download from the irda website at www.irda.org. 1.1 applications the MCP2140 infrared communications controller, supporting the irda standard, provides embedded sys- tem designers the easiest way to implement irda stan- dard wireless connectivity. figure 1-1 shows a typical application block diagram, while ta bl e 1 -2 shows the pin definitions. table 1-1: overview of features infrared communication is a wireless, two-way data connection using infrared light generated by low-cost transceiver signaling technology. this provides reliable communication between two devices. infrared technology offers: ? universal standard for connecting portable computing devices ? easy, effortless implementation ? economical alternative to other connectivity solutions ? reliable, high-speed connections ? safe to use in any environment (can even be used during air travel) ? eliminates the hassle of cables ? allows pcs and other electronic devices (such as pdas, cell phones, etc.) to communicate with each other ? enhances mobility by allowing users to easily connect the MCP2140 allows the easy addition of irda stan- dard wireless connectivity to any embedded applica- tion that uses serial data. figure 1-1 shows typical implementation of the MCP2140 in an embedded system. the irda protocol for printer support is not included in the ircomm 9-wire ?cooked? service class. features MCP2140 serial communications uart, ir baud rate selection fixed low power mode ye s resets (and delays) reset , por (pwrt and ost) packages 18-pin dip, soic, 20-pin ssop
MCP2140 ds21790a-page 4 preliminary ? 2003 microchip technology inc. figure 1-1: system block diagram decode encode tx txir rx i/o MCP2140 picmicro ? so si uart baud rate generator uart control logic rxpd rxpdref + - ir led ir receive detect circuitry ir photo diode rts cts dsr dtr cd ri phact uart flow i/o i/o i/o i/o i/o i/o control (1) MCP2140 status (1) note 1: not all microcontroller i/o pins are required to be connected to the MCP2140. microcontroller
? 2003 microchip technology inc. preliminary ds21790a-page 5 MCP2140 table 1-2: MCP2140 pin description normal operation (dce) pin name pin number pin type buffer type pdip soic ssop description rxpdref 1 1 1 i a ir receive photo detect diode reference voltage. this voltage will typically be in the range of v dd /2. txir 2 2 2 o ? asynchronous transmit to irda transceiver. phact 3 3 3 oc ? protocol handler active. indicates the state of the MCP2140 protocol handler. this output is an open collector, so an external pull-up resistor may be required. 1 = protocol handler is in the discovery or nrm state 0 = protocol handler is in ndm state or the MCP2140 is in low power mode reset 4 4 4 i st resets the device v ss 5 5 5, 6 ? p ground reference for logic and i/o pins nc 6 6 7 i ? no connect tx 7 7 8 i ttl asynchronous receive; from host controller uart rx 8 8 9 o ? asynchronous transmit; to host controller uart ri 9 9 10 i ttl ring indicator. the state of this bit is communicated to the irda primary device. 1 = no ring indicate present 0 = ring indicate present dsr 10 10 11 o ? data set ready. indicates that the MCP2140 has estab- lished a valid irda link with a primary device (1) . this signal is locally emulated and not related to the dtr bit of the irda primary device. 1 = an ir link has not been established (no ir link) 0 = an ir link has been established (ir link) dtr 11 11 12 i ttl data terminal ready. indicates that the embedded device connected to the MCP2140 is ready for ir data. the state of this bit is communicated to the irda primary device via the irda dsr bit carried by ircomm. 1 = embedded device not ready 0 = embedded device ready cts 12 12 13 o ? clear to send. indicates that the MCP2140 is ready to receive data from the host controller. this signal is locally emulated and not related to the cts/rts bit of the irda primary device. 1 = host controller should not send data 0 = host controller may send data legend: ttl = ttl compatible input st = schmitt trigger input with cmos levels a = analog p = power cmos = cmos compatible input oc = open collector output i = input o = output 1: the state of the dtr output pin does not reflect the state of the dtr bit of the irda primary device.
MCP2140 ds21790a-page 6 preliminary ? 2003 microchip technology inc. rts 13 13 14 i ttl request to send. indicates that a host controller is ready to receive data from the MCP2140. this signal is locally emu- lated and not related to the cts/rts bit of the irda primary device. 1 = host controller not ready to receive data 0 = host controller ready to receive data v dd 14 14 15, 16 ? p positive supply for logic and i/o pins. osc2 15 15 17 o ? oscillator crystal output. osc1/clkin 16 16 18 i cmos oscillator crystal input/external clock source input. cd 17 17 19 i st carrier detect. the state of this bit is communicated to the irda primary device via the irda cd bit. 1 = no carrier present 0 = carrier present rxpd 18 18 20 i a ir rx photo detect diode input. this input signal is required to be a pulse to indicate an ir bit. when the amplitude of the signal crosses the amplitude threshold set by the rxpdref pin, the ir bit is detected. the pulse has minimum and max- imum requirements as specified in parameter ir131a . table 1-2: MCP2140 pin description normal operation (dce) (continued) pin name pin number pin type buffer type pdip soic ssop description legend: ttl = ttl compatible input st = schmitt trigger input with cmos levels a = analog p = power cmos = cmos compatible input oc = open collector output i = input o = output 1: the state of the dtr output pin does not reflect the state of the dtr bit of the irda primary device.
? 2003 microchip technology inc. preliminary ds21790a-page 7 MCP2140 2.0 device operation the MCP2140 serial interface and ir baud rates are fixed at 9600 baud, given a 7.3728 mhz device clock . 2.1 power-up any time the device is powered up ( parameter d003 ), the power-up timer delay ( parameter 33 ) occurs, fol- lowed by an oscillator start-up timer (ost) delay ( parameter 32 ). once these delays complete, commu- nication with the device may be initiated. this commu- nication is from both the infrared transceiver?s side and the controller?s uart interface. 2.2 device reset the MCP2140 is forced into the reset state when the reset pin is in the low state. once the reset pin is brought to a high state, the device reset sequence occurs. once the sequence completes, functional operation begins. 2.3 device clocks the MCP2140 requires a clock source to operate. this clock source is used to establish the device timing, including the device ?bit clock?. 2.3.1 clock source the clock source can be supplied by one of the following: ? crystal ? resonator ? external clock the frequency of this clock source must be 7.3728 mhz (electrical specification parameter 1a ) for device communication at 9600 baud. 2.3.1.1 crystal oscillator / ceramic resonators a crystal or ceramic resonator can be connected to the osc1 and osc2 pins to establish oscillation ( figure 2-1 ). the MCP2140 oscillator design requires the use of a parallel-cut crystal. use of a series of cut crystals may give a frequency outside of the crystal manufacturers specifications. figure 2-1: crystal operation (ceramic resonator) table 2-1: capacitor selection for ceramic resonators table 2-2: capacitor selection for crystal oscillator freq osc1 (c1) osc2 (c2) 7.3728 mhz 10 - 22 pf 10 - 22 pf note: higher capacitance increases the stability of the oscillator, but also increases the start-up time. these values are for design guidance only. since each resonator has its own characteristics, the user should consult the resonator manufacturer for appropriate values of external components. freq osc1 (c1) osc2 (c2) 7.3728 mhz 15 - 30 pf 15 - 30 pf note: higher capacitance increases the stability of the oscillator but also increases the start- up time. these values are for design guid- ance only. r s may be required to avoid overdriving crystals with low drive level specification. since each crystal has its own characteristics, the user should con- sult the crystal manufacturer for appropriate values of external components. see table 2-1 and table 2-2 for recommended values of c1 and c2. note: a series resistor may be required for at strip cut crystals. c1 c2 xtal osc2 rs osc1 rf to internal MCP2140 (note) logic
MCP2140 ds21790a-page 8 preliminary ? 2003 microchip technology inc. 2.3.1.2 external clock for applications where a clock is already available elsewhere, users may directly drive the MCP2140 pro- vided that this external clock source meets the ac/dc timing requirements listed in section 4.3, ?timing dia- grams and specifications? . figure 2-2 shows how an external clock circuit should be configured. figure 2-2: external clock 2.3.2 bit clock the device crystal is used to derive the communication bit clock (bitclk). there are 16 bitclks for each bit time. the bitclks are used for the generation of the start bit and the eight data bits. the stop bit uses the bitclk when the data is transmitted (not for reception). this clock is a fixed-frequency and has minimal variation in frequency (specified by the crystal manufacturer). clock from external MCP2140 osc1 osc2 open system
? 2003 microchip technology inc. preliminary ds21790a-page 9 MCP2140 2.4 host uart interface the host uart interface communicates with the host controller. this interface has eight signals associated with it: tx, rx, rts, cts, dsr, dtr, cd and ri. sev- eral of these signals are locally generated (not passed over the ir interface). the host uart is a half-duplex interface, meaning that the system is either transmitting or receiving, but not both simultaneously. 2.4.1 baud rate the baud rate for the MCP2140 serial port (the tx and rx pins) is fixed at 9600 baud when the device frequency is 7.3728 mhz. 2.4.2 transmitting when the controller sends serial data to the MCP2140, the controller?s baud rate is required to match the baud rate of the MCP2140?s serial port. 2.4.3 receiving when the controller receives serial data from the MCP2140, the controller?s baud rate is required to match the baud rate of the MCP2140?s serial port. 2.4.4 hardware handshaking there are three host uart signals used to control the handshaking operation between the host controller and the MCP2140. they are: ?dsr ?rts ?cts 2.4.4.1 dsr the dsr signal is used to indicate that a link has been established between the MCP2140 and the primary device. please refer to section 2.13, ?how devices connect?, for information on how devices connect. 2.4.4.2 rts the rts signal indicates to the MCP2140 that the host controller is ready to receive serial data. once an ir data packet has been received, the rts signal will be low for the received data to be transferred to the host controller. if the rts signal remains high, an ir link timeout will occur and the MCP2140 will disconnect from the primary device. 2.4.4.3 cts the MCP2140 generates the cts signal locally due to buffer limitations. the MCP2140 uses a 64-byte buffer for incoming data from the ir host. another 29-byte buffer is provided to buffer data from the uart serial port. the MCP2140 can handle ir data and host uart serial port data simultaneously. a hardware handshaking pin (cts) is provided to inhibit the host controller from sending serial data when the host uart buffer is not available (figure 2-3). figure 2-4 shows a flow chart for host uart flow control using the cts signal. figure 2-3: host uart cts signal and the receive buffer note 1: the MCP2140 generates several non- data signals locally. 2: the MCP2140 emulates a 3-wire serial connection (txd, rxd and gnd). the transceiver?s transmit data (txd), receive data (rxd) signals, and the state of the cd. ri and dtr input pins are carried back and forth to the primary device. 3: the rts and cts signals are local emulations. note: when the cts output signal goes high, the uart fifo will store up to 6 bytes. this is to allow devices that have a slow response time to a change on the cts signal time to stop sending additional data (such as a modem). cts receive buffer empty MCP2140 can receive data receive buffer has 22 bytes, receive buffer receive buffer empty MCP2140 can receive data ir data packet transmitted full (29 bytes) cts pin driven high ir data packet starts transmission
MCP2140 ds21790a-page 10 preliminary ? 2003 microchip technology inc. figure 2-4: host uart cts flow control flowchart transmit byte cts low? y n cntr = 6 cts low? y n dtr low? y n transmit byte cts low? y n cntr = cntr - 1 cntr = 0? y n ir flow start lost ir link
? 2003 microchip technology inc. preliminary ds21790a-page 11 MCP2140 2.5 encoder/decoder the encoder converts the uart format data into the irda standard format data and the decoder converts irda standard format data into uart format data. 2.5.1 encoder (modulation) the data that the MCP2140 uart received (on the tx pin) that needs to be transmitted (on the txir pin) will need to be modulated. this modulated signal drives the ir transceiver module. figure 2-5 shows the encoding of the modulated signal. each bit time is comprised of 16-bit clocks. if the value to be transmitted (as determined by the tx pin) is a logic-low, the txir pin will output a low level for 7-bit clock cycles, a logic high level for 3-bit clock cycles or a minimum of 1.6 sec (see parameter ir121 ). the remaining 6-bit clock cycles will be low. if the value to transmit is a logic-high, the txir pin will output a low level for the entire 16-bit clock cycles. figure 2-5: encoding note: the signal on the txir pin does not actu- ally line up in time with the bit value that was transmitted on the tx pin, as shown in figure 2-5 . the tx bit value is shown to represent the value to be transmitted on the txir pin. bitclk tx bit txir 0100 0 1 16 clk 7 clk start bit data bit 0 data bit 1 data bit 2 data bit ... 24 tosc value
MCP2140 ds21790a-page 12 preliminary ? 2003 microchip technology inc. 2.5.2 decoder (demodulation) the modulated signal (data) from the ir transceiver module (on rxir pin) needs to be demodulated to form the received data (on rx pin). once demodula- tion of the data byte occurs, the data that is received is transmitted by the MCP2140 uart (on the rx pin). figure 2-6 shows the decoding of the modulated signal. each bit time is comprised of 16-bit clocks. if the value to be received is a logic-low, the rxir pin will be a low level for the first 3-bit clock cycles, or a minimum of 1.6 s. the remaining 13-bit clock cycles (or difference up to the 16-bit clock time) will be high. if the value to be received is a logic-high, the rxir pin will be a high level for the entire 16-bit clock cycles. the level on the rx pin will be in the appropriate state for the entire 16 clock cycles. 2.6 ir port baud rate the baud rate for the MCP2140 ir port (the txir and rxir pins) is fixed at the default rate of 9600 baud. the primary device will be informed of this parameter dur- ing ndm. the host uart baud rate and the ir port baud rate are the same. figure 2-6: decoding note: the signal on the rx pin does not actually line up in time with the bit value that was received on the rxir pin, as shown in figure 2-6 . the rxir bit value is shown to represent the value to be transmitted on the rx pin. bitclk rx rxir bit value 0100 0 1 1.6 s (up to 3 clk) 13 clk 16 clk 16 clk 16 clk 16 clk 16 clk 16 clk 16 clk start bit data bit 0 data bit 1 data bit 2 data bit ... (clk) rxpd rxpdref
? 2003 microchip technology inc. preliminary ds21790a-page 13 MCP2140 2.7 irda data protocols supported by MCP2140 the MCP2140 supports these required irda standard protocols: ? physical signaling layer (phy) ? link access protocol (irlap) ? link management protocol/information access service (irlmp/ias) the MCP2140 also supports some of the optional pro- tocols for irda standard data. the optional protocols implemented by the MCP2140 are: ?tiny tp ?ircomm figure 2-7 shows the irda data protocol stack and those components implemented by the MCP2140. figure 2-7: irda data - protocol stacks 2.7.1 ircomm ircomm provides the method to support serial and par- allel port emulation. this is useful for legacy com applications, such as printers and modem devices. the ircomm standard is a syntax that allows the pri- mary device to consider the secondary device a serial device. ircomm allows for emulation of serial or paral- lel (printer) connections of various capabilities. the MCP2140 supports the 9-wire ?cooked? service class of ircomm. other service classes supported by ircomm are shown in figure 2-8 . the irda protocol for printer support is not included in the ircomm 9-wire ?cooked? service class. figure 2-8: ircomm service classes ircomm (1) ir link management - mux (irlmp) ir link access protocol (irlap) optional irda data protocols not supported by the MCP2140 supported by the MCP2140 irtran-p irobex irlan irmc lm-ias tiny transport protocol (tiny tp) synchronous 4 ppm (4 mb/s) synchronous serial ir (1.152 mb/s) asynchronous serial ir (2, 3) (9600 -115200 b/s) note 1: the MCP2140 implements the 9-wire ?cooked? service class serial replicator. 2: the MCP2140 is fixed at 9600 baud 3: an optical transceiver is required. ircomm services uncooked services cooked services parallel serial irlpt 3-wire raw parallel centronics ieee 1284 serial 3-wire cooked 9-wire cooked supported by MCP2140 3-wire raw
MCP2140 ds21790a-page 14 preliminary ? 2003 microchip technology inc. 2.8 minimizing power during ir communication between a primary device and the MCP2140, the MCP2140 is in an operational mode. in this mode, the MCP2140 consumes the operational current ( parameter d010 ). for many applications, the time that ir communication is occurring is a small percentage of the applications operational time. the ability for the ir controller to be in a low power mode during this time will save on the applications power consumption. the MCP2140 will automatically enter a low power mode once ir activity has stopped and will return to operational mode once ir activity is detected on the rxpd and rxpdref pins. another way to minimize system power is to use an i/o pin of the host controller to enable power to the ir circuity 2.8.1 automatic low power mode the automatic low power mode allows the system to achieve the lowest possible operating current. when the ir link has been ?closed?, the protocol han- dler state machine returns to the normal disconnect mode (ndm). during ndm, if no ir activity occurs for about 10 seconds, the device is disabled and enters into low power mode. in this mode, the device oscilla- tor is shut down and the phact pin will be low ( parameter d010a ). table 2-3 shows the MCP2140 current. these are specified in parameter d010 and parameter d010a . table 2-3: device maximum operating current 2.8.2 returning to device operation the device will exit the low power mode when the rxpd pin voltage crosses the repdref pin reference voltage. a device reset will also cause the MCP2140 to exit low power mode. after device initialization, if no ir activity occurs for about 10 seconds, the device is disabled and returns into the low power mode. 2.9 phact signal the phact signal indicates that the MCP2140 proto- col handler is active. this output pin is an open collec- tor, so when interfacing to the host controller, a pull-up resistor is required. mode current comment phact = h 2.2 ma ir communications is occurring. phact = l 60 a no ir communications. note: additional system current is from the receiver/transmitter circuitry. note: for proper operation, the device oscillator must be within oscillator specification in the time frame specified in parameter ir140 .
? 2003 microchip technology inc. preliminary ds21790a-page 15 MCP2140 2.10 buffers and throughput the ir data rate of the MCP2140 is fixed at 9.6 kbaud. the actual throughput will be less due to several fac- tors. the most significant factors are under the control of the developer. one factor beyond the control of the designer is the overhead associated with the irda standard. a throughput example is shown in tab l e 2 -4 . figure 2-9 shows the cts waveform, what the state of the buffers can be and the operation of the host uart and ir interfaces. figure 2-10 shows the screen-capture of a host con- troller transmitting 240 bytes. data is not transmitted after cts goes high (so only a maximum of 23 bytes of the 29 byte buffer are utilized). between data packets, the cts time can vary, depending on the primary device (see blue circled cts pulse in figure 2-10). table 2-4: throughput figure 2-9: host uart receive buffer and cts waveform figure 2-10: host controller transmission of a 240 byte packet bytes transferred (3) bytes/ cts low time (s) effective baud rate 240 23 (max) (1) 0.810133 2962 (1) 240 29 0.6500 3692 (2) note 1: measured from figure 2-10. 2: interpolated from figure 2-10. 3: 10 bits transferred for each byte. note: irda throughput is based on many factors associated with characteristics of the pri- mary and secondary devices. these char- acteristics may cause your throughput to be more or less than is shown in table 2-4. cts receive buffer empty MCP2140 can receive data receive buffer has 22 bytes, receive buffer receive buffer empty MCP2140 can receive data ir data packet transmitted full (29 bytes) cts pin driven high ir data packet starts transmission
MCP2140 ds21790a-page 16 preliminary ? 2003 microchip technology inc. 2.10.1 improving throughput actual maximum throughput is dependent on several factors, including: ? characteristics of the primary device ? characteristics of the MCP2140 ? irda standard protocol overhead the irda standard specifies how the data is passed between the primary device and secondary device. in ircomm, an additional 8 bytes are used by the protocol for each packet transfer. the most significant factor in data throughput is how well the data frames are filled. if only 1 byte is sent at a time, the throughput overhead of the ircomm protocol is 89% (see ta bl e 2 -5 ). the best way to maximize throughput is to align the amounts of data with the receive buffer (ir and host uart) packet size of the MCP2140. then there is the delay between when data packets are sent and received. see figure 2-10 for an example of this delay (look at cts signal falling edges). in this screen capture, a palm? m105 is receiving a 240- byte string of data from the MCP2140. when the cts signal goes high, the host controller stops sending data (23 bytes per cts low-time). the cts falling edge to cts falling edge is approximately 90 ms (typ- ical). this cts high-time affects the total data through- put. the cts high-time will be dependant on the characteristics of the primary device. table 2-5: ircomm overhead % 2.10.1.1 from the primary device the MCP2140 uses a fixed ir receiver data block size of 64 bytes. the minimum size frame the primary device can respond with is 6 bytes. 2.10.1.2 from the MCP2140 the MCP2140 uses a fixed host uart receiver data block size of 29 bytes. 2.11 turnaround latency an ir link can be compared to a one-wire data connec- tion. the ir transceiver can transmit or receive, but not both at the same time. a delay of one bit time is recom- mended between the time a byte is received and another byte is transmitted. 2.12 device id the MCP2140 has a fixed device id. this device id is ?MCP2140 xx?, with the xx indicating the silicon revision of the device. MCP2140 data packet size (bytes) ircomm overhead (bytes) ircomm overhead % (1) comment ir receive 64 8 11 % note 2 1 8 89 % host uart receive 29 8 22 % note 3 23 8 26 % note 4 1 8 89 % note 1: overhead % = overhead/(overhead + data). 2: the maximum number of bytes of the ir receive buffer. 3: the maximum number of bytes of the host uart receive buffer. 4: the cts signal is driven high at 23 byte.
? 2003 microchip technology inc. preliminary ds21790a-page 17 MCP2140 2.13 optical interface the MCP2140 requires an infrared transceiver for the optical interface. this transceiver can be a single-chip solution (integrated) or be implemented with discrete devices. 2.13.1 discrete transceiver solution the MCP2140 was designed to use a discrete imple- mentation that allows the lowest system power consumption as well as a low cost implementation. figure 2-12 shows a typical discrete optical transceiver circuit. figure 2-11: circuit for a discrete optical transceiver care must be taken in the design and layout of the photo-detect circuit, due to the small signals that are being detected and their sensitivity to noise. 2.13.2 integrated transceiver the MCP2140 was designed to use a discrete imple- mentation that allows the lowest system power con- sumption and a low cost implementation (see section 2.12.1, ?discrete transceiver solution?). it is possible to use an integrated optical transceiver solu- tion, with the addition of four components. two com- ponents are required to condition the input signal to ensure that the rxir pulse width is not greater than 1.5 s (see parameter ir131a ). the other two com- ponents are required to set the rxir signal trip point (typically v dd /2). figure 2-12 shows an example MCP2140 optical transceiver circuit, using a vishay ? / temic tfds4500. figure 2-12: circuit for an integrated optical transceiver ta b le 2 - 6 shows a list of common manufacturers of integrated optical transceivers. this figure will be available in revision b of the MCP2140 data sheet. please conact the microchip factory via email (tech.support@microchip.com) for additional information. +5 v +5 v r11 22 ? tfds4500 u6 8 7 6 5 47 ? r13 1 2 3 4 c18 .1 f rxpd (to MCP2140 pin 2) txir (to MCP2140 pin 18) +5 v c19 (1) q1 (1) 68 pf mun211t1 +5 v rxpdref (to MCP2140 pin 1) 10 k ? r14 (2) 10 k ? r15 (2) note 1: these components are used to control the width of the tfds4500 rxd output signal. q1 is a digital transistor, which includes the bias resistors. 2: these components are used to set the reference voltage that the rxpd signal needs to cross to ?detect? a bit.
MCP2140 ds21790a-page 18 preliminary ? 2003 microchip technology inc. 2.14 how the MCP2140 connects when two devices, implementing the irda standard feature, establish a connection using the ircomm pro- tocol, the process is analogous to connecting two devices with serial ports using a cable. this is referred to as a ?point-to-point? connection. this connection is limited to half-duplex operation because the ir trans- ceiver cannot transmit and receive at the same time. the purpose of the irda standard protocol is to allow this half-duplex link to emulate, as much as possible, a full-duplex connection. in general, this is done by divid- ing the data into ?packets?, or groups of data. these packets can be sent back and forth, when needed, without risk of collision. the rules of how and when these packets are sent constitute the irda standard protocol. the MCP2140 supports elements of this irda standard protocol to communicate with other irda stan- dard compatible devices. when a wired connection is used, the assumption is made that both sides have the same communications parameters and features. a wired connection has no need to identify the other connector because it is assumed that the connectors are properly connected. according to the irda standard, a connection process has been defined to identify other irda standard com- patible devices and establish a communication link. there are three steps that these two devices go through to make this connection. they are: ? normal disconnect mode (ndm) ? discovery mode ? normal connect mode (ncm) figure 2-13 shows the connection sequence. 2.14.1 normal disconnect mode (ndm) when two irda standard compatible devices come into range, they must first recognize each other. the basis of this process is that one device has some task to accomplish and the other device has a resource needed to accomplish this task. one device is referred to as a primary device while the other is referred to as a secondary device. the distinction between primary device and secondary device is important because it is the responsibility of the primary device to provide the mechanism to recognize other devices. so the primary device must first poll for nearby irda standard compat- ible devices and, during this polling, the default baud rate of 9600 baud is used by both devices. for example, if you want to print from an irda-equipped laptop to an irda-equipped printer, utilizing the irda standard feature, you would first bring your laptop in range of the printer. in this case, the laptop is the one that has something to do and the printer has the resource to do it. thus, the laptop is called the primary device and the printer is the secondary device. some data-capable cellphones have irda standard infrared ports. if you used such a cell phone with a personal digital assistant (pda), the pda that supports the irda standard feature would be the primary device and the cell phone would be the secondary device. when a primary device polls for another device, a nearby secondary device may respond. when a sec- ondary device responds, the two devices are defined to be in the normal disconnect mode (ndm) state. ndm is established by the primary device broadcasting a packet and waiting for a response. these broadcast packets are numbered. usually, 6 or 8 packets are sent. the first packet is number 0, while the last packet is usually numbered 5 or 7. once all the packets are sent, the primary device sends an id packet, which is not numbered. the secondary device waits for these packets and then responds to one of the packets. the packet responds to determine the ?timeslot? to be used by the secondary device. for example, if the secondary device responds after packet number 2, the secondary device will use timeslot 2. if the secondary device responds after packet number 0, the secondary device will use timeslot 0. this mechanism allows the primary device to recognize as many nearby devices as there are timeslots. the primary device will continue to generate timeslots and the secondary device should continue to respond, even if there?s nothing to do. during ndm, the MCP2140 handles all responses to the primary device ( figure 2-13 ) without any communi- cation with the host controller. the host controller is inhibited by the cts signal of the MCP2140 from sending data to the MCP2140. note 1: the MCP2140 can only be used to implement a secondary device. 2: the MCP2140 supports a system with only one secondary device having exclusive use of the irda standard infra- red link (known as ?point-to-point? communication). 3: the MCP2140 always responds to packet number 0. this means that the MCP2140 will always use timeslot 0. 4: if another secondary device is nearby, the primary device may fail to recognize the MCP2140, or the primary device may not recognize either of the devices.
? 2003 microchip technology inc. preliminary ds21790a-page 19 MCP2140 2.14.2 discovery mode discovery mode allows the primary device to deter- mine the capabilities of the MCP2140 (secondary device). discovery mode is entered once the MCP2140 (secondary device) has sent a xid response to the pri- mary device and the primary device has completed sending the xids and a broadcast id. if this sequence is not completed, a primary and secondary device can stay in ndm indefinitely. when the primary device has something to do, it initiates discovery, which has two parts. they are: ? link initialization ? resource determination the first step is for the primary and secondary devices to determine, and then adjust to, each other?s hardware capabilities. these capabilities are parameters like: ? data rate ? turnaround time ? number of packets without a response ? how long to wait before disconnecting both the primary and secondary devices begin com- munications at 9600 baud, the default baud rate. the primary device sends its parameters and the second- ary device responds with its parameters. for example, if the primary device supports all data rates up to 115.2 kbaud and the secondary device only supports 9.6 kbaud, the link will be established at 9.6 kbaud. once the hardware parameters are established, the primary device must determine if the secondary device has the resources it requires. if the primary device has a job to print, it must know if it?s talking to a printer, and not a modem or other device. this determination is made using the information access service (ias). the job of the secondary device is to respond to ias que- ries made by the primary device. the primary device must ask a series of questions like: ? what is the name of your service? ? what is the address of this service? ? what are the capabilities of this device? when all the primary device?s questions are answered, the primary device can access the service provided by the secondary device. during discovery mode, the MCP2140 handles all responses to the primary device (see figure 2-13 ) without any communication with the host controller. the host controller is inhibited by the cts signal of the MCP2140 from sending data to the MCP2140. 2.14.3 normal connect mode (ncm) once discovery has been completed, the primary device and MCP2140 (secondary device) can freely exchange data. the MCP2140 uses a hardware handshake to stop the local serial port from sending data when the MCP2140 host uart receiving buffer is full.. both the primary device and the MCP2140 (secondary device) check to make sure that data packets are received by the other without errors. even when data is not required to be sent, the primary and secondary devices will still exchange packets to ensure that the connection hasn?t, unexpectedly, been dropped. when the primary device has finished, it transmits the ?close link? command to the MCP2140 (secondary device). the MCP2140 will confirm the ?close link? command and both the primary device and the MCP2140 (sec- ondary device) will revert to the ndm state. it is the responsibility of the host controller program to understand the meaning of the data received and how the program should respond to it. it?s just as if the data were being received by the host controller from a uart. 2.14.3.1 primary device notification the MCP2140 identifies itself to the primary device as a modem. however, the MCP2140 is not a modem, and the non- data circuits are not handled in a modem fashion. note: the MCP2140 is limited to a data rate of 9.6 kbaud. note: data loss will result if this hardware handshake is not observed. note: if the ncm mode is unexpectedly termi- nated for any reason (including the primary device not issuing a close link command), the MCP2140 will revert to the ndm state approximately 10 seconds after the last frame has been received. note: the MCP2140 identifies itself as a modem to ensure that it is identified as a serial device with a limited amount of memory.
MCP2140 ds21790a-page 20 preliminary ? 2003 microchip technology inc. figure 2-13: high level MCP2140 connection sequence normal disconnect mode (ndm) send xid commands (timeslots n, n+1, ...) no response xid response in timeslot y, finish sending xids (max timeslots - y frames) broadcast id no response to these xids claiming this timeslot, ( mcp214x no response to broadcast id primary device MCP2140 discovery normal response mode (nrm) send snrm command (w/ parameters and connection address) open channel for ias queries send ias queries open channel for data send data or status shutdown link ua response with parameters using connect address confirm channel open for ias provide ias responses confirm channel open for data send data or status confirm shutdown (back to ndm state) (approximately 70 ms between xid commands) send data or status send data or status ( MCP2140 dsr pin driven low) (secondary device) always claims timeslot 0) no ir activity (for 10 seconds) phact pin driven low phact pin driven high no ir activity (for 10 seconds) phact pin driven low
? 2003 microchip technology inc. preliminary ds21790a-page 21 MCP2140 2.15 references the irda standards download page can be found at: http://www.irda.org/standards/specifications some common manufacturers of optical transceivers are shown in ta bl e 2 -6 . table 2-6: common optical transceiver manufacturers company company web site address sharp ? www.sharpsma.com infineon ? www.infineon.com agilent ? www.agilent.com vishay ? /temic www.vishay.com rohm www.rohm.com
MCP2140 ds21790a-page 22 preliminary ? 2003 microchip technology inc. notes:
? 2003 microchip technology inc. preliminary ds21790a-page 23 MCP2140 3.0 development tools an MCP2140 demo/development board is planned. please check with the microchip technology inc. web site (www.microchip.com) or your local microchip sales office for product availability.
MCP2140 ds21790a-page 24 preliminary ? 2003 microchip technology inc. notes:
? 2003 microchip technology inc. preliminary ds21790a-page 25 MCP2140 4.0 electrical characteristics absolute maximum ratings? ambient temperature under bias ................................................................................................. .......... ?40c to +125c storage temperature ............................................................................................................ ................. ?65c to +150c voltage on v dd with respect to v ss ........................................................................................................... -0.3v to +7.5v voltage on reset with respect to v ss ...................................................................................................... -0.3v to +14v voltage on all other pins with respect to v ss ................................................................................. ?0.3v to (v dd + 0.3v) total power dissipation (1) ............................................................................................................................... ............ 1w max. current out of v ss pin ........................................................................................................................... ....... 300 ma max. current into v dd pin ........................................................................................................................... .......... 250 ma input clamp current, i ik (vi < 0 or vi > v dd ) ................................................................................................................... 20 ma output clamp current, i ok (v0 < 0 or v0 > v dd ) ............................................................................................................. 20 ma max. output current sunk by any output pin..................................................................................... ..................... 25 ma max. output current sourced by any output pin.................................................................................. ................... 25 ma note 1: power dissipation is calculated as follows: p dis = v dd x {i dd - i oh } + {(v dd -v oh ) x i oh } + (v ol x i ol ) ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability.
MCP2140 ds21790a-page 26 preliminary ? 2003 microchip technology inc. figure 4-1: voltage-frequency graph, -40 c t a +85 c 6.0 2.5 4.0 3.0 0 3.5 4.5 5.0 5.5 410 frequency (mhz) v dd 20 (volts) 81216 7.3728 5.0
? 2003 microchip technology inc. preliminary ds21790a-page 27 MCP2140 4.1 dc characteristics dc specifications electrical characteristics: standard operating conditions (unless otherwise specified) operating temperature: -40 c t a +85 c (industrial) param. no. sym characteristic min typ (1) max units conditions d001 v dd supply voltage 3.0 ? 5.5 v see figure 4-1 d002 v dr ram data retention voltage (2) 2.0 ? ? v device oscillator/clock stopped d003 v por v dd start voltage to ensure power-on reset ? v ss ? v d004 sv dd v dd rise rate to ensure power-on reset 0.05 ? ? v/ms d010 d010a i dd supply current (3, 4) ? ? ? 25 2.2 60 ma a v dd = 3.0v, phact = h v dd = 3.0v, phact = l note 1: data in the typical (?typ?) column is based on characterization results at 25 c. this data is for design guidance only and is not tested. 2: this is the limit to which v dd can be lowered without losing ram data. 3: when the device is in ir communication (phact pin is high), supply current is mainly a function of the operating voltage and frequency. pin loading, pin rate and temperature have an impact on the current con- sumption.the test conditions for all i dd measurements are made when device is: osc1 = external square wave, from rail-to-rail; all input pins pulled to v ss , rxir = v dd , reset = v dd ; 4: when the device is in low power mode (phact pin is low), current is measured with all input pins tied to v dd or v ss and the output pins driving a high or low level into infinite impedance.
MCP2140 ds21790a-page 28 preliminary ? 2003 microchip technology inc. 4.1 dc characteristics (continued) dc specifications electrical characteristics: standard operating conditions (unless otherwise specified) operating temperature: -40c t a +85c (industrial) operating voltage v dd range as described in dc spec section 4.1 . param no. sym characteristic min typ max units conditions input low voltage v il input pins d030 with ttl buffer (tx, ri, dtr, rts, and cd) v ss ? 0.8v v 4.5v v dd 5.5v d030a v ss ? 0.15 v dd v otherwise d032 reset v ss ? 0.2 v dd v d033 osc1 v ss ? 0.3 v dd v input high voltage v ih input pins ? d040 with ttl buffer (tx, ri, dtr, rts, and cd) 2.0 ? v dd v 4.5v v dd 5.5v d040a 0.25 v dd + 0.8 ? v dd v otherwise d042 reset 0.8 v dd ? v dd v d043 osc1 0.7 v dd ? v dd v input leakage current (notes 1, 2) d060 i il input pins ? ? 1 a v ss v pin v dd , pin at high-impedance. d061 reset ? ? 5 a v ss v pin v dd d063 osc1 ? ? 5 a v ss v pin v dd output low voltage d080 v ol txir, rx , dsr, and cts pins ? ? 0.6 v i ol = 8.5 ma, v dd = 4.5v d083 osc2 ? ? 0.6 v i ol = 1.6 ma, v dd = 4.5v output high voltage (note 2) d090 v oh txir, rx , dsr, and cts pins v dd - 0.7 ? ? v i oh = -3.0 ma, v dd = 4.5v d092 osc2 v dd - 0.7 ? ? v i oh = -1.3 ma, v dd = 4.5v capacitive loading specs on output pins d100 c osc 2 osc2 pin ? ? 15 pf when external clock is used to drive osc1. d101 c io all input or output pins ? ? 50 pf note 1: the leakage current on the reset pin is strongly dependent on the applied voltage level. the specified levels represent normal operating conditions. higher leakage current may be measured at different input voltages. 2: negative current is defined as coming out of the pin.
? 2003 microchip technology inc. preliminary ds21790a-page 29 MCP2140 4.2 timing parameter symbology and load conditions the timing parameter symbols have been created following one of the following formats: 4.2.1 timing conditions the temperature and voltages specified in tab le 4 -2 apply to all timing specifications, unless otherwise noted. figure 4-2 specifies the load conditions for the timing specifications. table 4-1: symbology table 4-2: ac temperature and voltage specifications figure 4-2: load conditions for device timing specifications 1. tpps2pps 2. tpps t f frequency ttime eerror lowercase letters (pp) and their meanings: pp io input or output pin osc oscillator rx receive tx transmit bitclk rx/tx bitclk rst reset drt device reset timer uppercase letters and their meanings: s ffall pperiod hhigh rrise i invalid (high-impedance) vvalid llow z high-impedance ac specifications electrical characteristics: standard operating conditions (unless otherwise stated): operating temperature: -40 c t a +85 c (industrial) operating voltage v dd range as described in dc spec section 4.1 . pin v ss c l c l = 50 pf for all pins except osc2 15 pf for osc2 when external clock is used to drive osc1
MCP2140 ds21790a-page 30 preliminary ? 2003 microchip technology inc. 4.3 timing diagrams and specifications figure 4-3: external clock timing table 4-3: external clock timing requirements ac specifications electrical characteristics: standard operating conditions (unless otherwise specified): operating temperature: -40 c t a +85 c (industrial) operating voltage v dd range is described in section 4.1 param. no. sym characteristic min typ (1) max units conditions 1 t osc external clkin period (2 , 3) 90.422 90.422 ? ? 90.422 ? ns ns device operation low power mode (phact drive low) oscillator period (2) 90.422 ? 90.422 ns 1a f osc external clkin frequency (2 , 3) 7.3728 7.3728 7.3728 mhz oscillator frequency (2) 7.3728 ? 7.3728 mhz 1b f err error in frequency ? ? 0.01 % 1c e clk external clock error ? ? 0.01 % 4 to s r , to s f clock in (osc1) rise or fall time ? ? 15 ns note 1: data in the typical (?typ?) column is at 5v, 25 c unless otherwise stated. these parameters are for design guidance only and are not tested. 2: all specified values are based on oscillator characterization data under standard operating conditions. exceeding these specified limits may result in unstable oscillator operation and/or higher than expected current consumption. when an external clock input is used, the ?max? cycle time limit is ?dc? (no clock) for all devices. 3: a duty cycle of no more than 60% (high time/low time or low time/high time) is recommended for external clock inputs. osc1 q4 q1 q2 q3 q4 q1 1 33 44 2
? 2003 microchip technology inc. preliminary ds21790a-page 31 MCP2140 figure 4-4: output waveform table 4-4: output timing requirements ac specifications electrical characteristics: standard operating conditions (unless otherwise specified): operating temperature: -40 c t a +85 c (industrial) operating voltage v dd range is described in section 4.1 param. no. sym characteristic min typ (1) max units conditions 20 to r rx and txir pin rise time (2) ? 10 40 ns 21 to f rx and txir pin fall time (2) ? 10 40 ns note 1: data in the typical (?typ?) column is at 5v, 25c unless otherwise stated. 2: see figure 4-2 for loading conditions. osc1 output pin q4 q1 q2 q3 20, 21 old value new value note: refer to figure 4-2 for load conditions.
MCP2140 ds21790a-page 32 preliminary ? 2003 microchip technology inc. figure 4-5: reset and device reset timing table 4-5: reset and device reset requirements ac specifications electrical characteristics: standard operating conditions (unless otherwise specified): operating temperature: -40 c t a +85 c (industrial) operating voltage v dd range is described in section 4.1 param. no. sym characteristic min typ (1) max units conditions 30 t rst l reset pulse width (low) 2000 ? ? ns v dd = 5.0v 32 t ost oscillator start-up timer period 1024 ? 1024 t osc 33 t pwrt power up timer period 28 72 132 ms v dd = 5.0v 34 t ioz output high-impedance from reset low or device reset ? ? 2 s note 1: data in the typical (?typ?) column is at 5v, 25 c unless otherwise stated. v dd reset reset detected pwrt timeout osc timeout internal reset 33 32 30 34 output pin 34
? 2003 microchip technology inc. preliminary ds21790a-page 33 MCP2140 figure 4-6: uart asynchronous transmission waveform table 4-6: uart asynchronous transmission requirements ac specifications electrical characteristics: standard operating conditions (unless otherwise specified): operating temperature: -40 c t a +85 c (industrial) operating voltage v dd range is described in section 4.1 param. no. sym characteristic min typ max units conditions ir100 t txbit transmit baud rate 768 ? 768 t osc baud2:baud0 = 00 ir101 e txbit transmit (tx pin) baud rate error (into MCP2140) ? ? 2 % ir102 e txirbit transmit (txir pin) baud rate error (out of MCP2140) (1) ? ? 1 % ir103 t tx rf tx pin rise time and fall time ? ? 25 ns note 1: this error is not additive to ir101 parameter. note: refer to figure 4-2 for load conditions. ir103 tx pin ir100 ir103 ir100 ir100 ir100 start bit data bit data bit data bit
MCP2140 ds21790a-page 34 preliminary ? 2003 microchip technology inc. figure 4-7: uart asynchronous receive timing table 4-7: uart asynchronous receive requirements ac specifications electrical characteristics: standard operating conditions (unless otherwise specified): operating temperature: -40c t a +85c (industrial) operating voltage v dd range is described in section 4.1 param. no. sym characteristic min typ max units conditions ir110 t rxbit receive baud rate 768 ? 768 t osc baud2:baud0 = 00 ir111 e rxbit receive (rxpd and rxpdref pin detection) baud rate error (into MCP2140) ? ? 1 % ir112 e rxbit receive (rx pin) baud rate error (out of MCP2140) (1) ? ? 1 % ir113 t tx rf rx pin rise time and fall time ? ? 25 ns note 1: this error is not additive to the ir111 parameter. note: refer to figure 4-2 for load conditions. ir113 rx pin ir113 ir110 ir110 ir110 start bit data bit data bit data bit ir110
? 2003 microchip technology inc. preliminary ds21790a-page 35 MCP2140 figure 4-8: txir waveforms table 4-8: txir requirements ac specifications electrical characteristics: standard operating conditions (unless otherwise specified): operating temperature: -40 c t a +85 c (industrial) operating voltage v dd range is described in section 4.1 param. no. sym characteristic min typ max units conditions ir100a t txirbit transmit baud rate 768 ? 768 t osc baud = 9600 ir121 t txir pw txir pulse width 24 ? 24 t osc ir122 t txir p txir bit period (1) ? 16 ? t bitclk note 1: t bitclk = t txbit /16. bitclk txir 0100 0 1 ir100a ir121 start bit data bit 7 data bit 6 data bit 5 data bit ... ir122 ir122 ir122 ir122 ir122 ir122
MCP2140 ds21790a-page 36 preliminary ? 2003 microchip technology inc. figure 4-9: rxpd/rxpdref waveforms table 4-9: rxpd/rxpdref requirements ac specifications electrical characteristics: standard operating conditions (unless otherwise specified): operating temperature: -40 c t a +85 c (industrial) operating voltage v dd range is described in section 4.1 param. no. sym characteristic min typ max units conditions ir110a t rxpdbit receive baud rate 768 ? 768 t osc baud = 9600 ir131a t rxpd pw rxpd pulse width 0.01 ? 1.5 s ir132 t rxpd p rxpd/rxpdref bit period (1) ? 16 ? t bitclk ird060 v rxpd d ? quiescent delta voltage between rxpd and rxpdref 20 ? ? mv ird061 v rxpd e ir pulse detect delta voltage (rxpd to rxpdref) 30 ? ? mv rxpd signal must cross rxpdref signal level ir133 t resp response time (2) ? ? 400 * ns * these parameters characterized but not tested. note 1: t bitclk = t rxbit /16. 2: response time measured with rxpdref at (v dd - 1.5v)/2, while rxpd transitions from v ss to v dd . bitclk rxpd 0100 0 1 ir131a ir110a ir131b ir131b ir131b ir131b ir131b ir131b start bit data bit 7 data bit 6 data bit 5 data bit ... start bit data bit 7 data bit 6 data bit 5 data bit ... rxpdref rxpd rxpdref ird160 ird161 rxpd rxpdref ird160 ird161
? 2003 microchip technology inc. preliminary ds21790a-page 37 MCP2140 figure 4-10: low power waveform table 4-10: low power requirements ac specifications electrical characteristics: standard operating conditions (unless otherwise specified): operating temperature: -40 c t a +85 c (industrial) operating voltage v dd range is described in section 4.1 param. no. sym characteristic min typ max units conditions ir140 t rxpd 2 osc rxpd pulse edge to valid device oscillator (1) ? ? 4 ms note 1: at 9600 baud, 4 ms is 4 bytes (of the 11 byte repeated sof character). this allows the MCP2140 to recognize a sof character and properly receive the ir packet. osc1 rxpd ir140 rxpdref
MCP2140 ds21790a-page 38 preliminary ? 2003 microchip technology inc. notes:
? 2003 microchip technology inc. preliminary ds21790a-page 39 MCP2140 5.0 dc and ac characteristics graphs and tables not available at this time.
MCP2140 ds21790a-page 40 preliminary ? 2003 microchip technology inc. notes:
? 2003 microchip technology inc. preliminary ds21790a-page 41 MCP2140 6.0 packaging information 6.1 package marking information 18-lead pdip (300 mil) example: 18-lead soic (300 mil) example: 20-lead ssop (209 mil, 5.30 mm) example: xxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxx xxxxx yywwnnn xxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxx xxxxx yywwnnn xxxxxxxxxxx xxxxxxxxxxx xxx yywwnnn legend: xx...x customer specific information* yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard device marking consists of microchip part number, year code, week code and traceability code. MCP2140 i/ss xxx 0352987 MCP2140-i/so xxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxx xxxxx 0352987 MCP2140-i/p xxxxxxxxxxxxxxxxx xxxxx 0352987
MCP2140 ds21790a-page 42 preliminary ? 2003 microchip technology inc. 18-lead plastic dual in-line (p) ? 300 mil (pdip) 15 10 5 15 10 5 mold draft angle bottom 15 10 5 15 10 5 mold draft angle top 10.92 9.40 7.87 .430 .370 .310 eb overall row spacing 0.56 0.46 0.36 .022 .018 .014 b lower lead width 1.78 1.46 1.14 .070 .058 .045 b1 upper lead width 0.38 0.29 0.20 .015 .012 .008 c lead thickness 3.43 3.30 3.18 .135 .130 .125 l tip to seating plane 22.99 22.80 22.61 .905 .898 .890 d overall length 6.60 6.35 6.10 .260 .250 .240 e1 molded package width 8.26 7.94 7.62 .325 .313 .300 e shoulder to shoulder width 0.38 .015 a1 base to seating plane 3.68 3.30 2.92 .145 .130 .115 a2 molded package thickness 4.32 3.94 3.56 .170 .155 .140 a top to seating plane 2.54 .100 p pitch 18 18 n number of pins max nom min max nom min dimension limits millimeters inches* units 1 2 d n e1 c eb e p a2 l b1 b a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-001 drawing no. c04-007 significant characteristic
? 2003 microchip technology inc. preliminary ds21790a-page 43 MCP2140 18-lead plastic small outline (so) ? wide, 300 mil (soic) foot angle 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.36 .020 .017 .014 b lead width 0.30 0.27 0.23 .012 .011 .009 c lead thickness 1.27 0.84 0.41 .050 .033 .016 l foot length 0.74 0.50 0.25 .029 .020 .010 h chamfer distance 11 .73 11.53 11.33 .462 .454 .446 d overall length 7.59 7.49 7.39 .299 .295 .291 e1 molded package width 10.67 10.34 10.01 .420 .407 .394 e overall width 0.30 0.20 0.10 .012 .008 .004 a1 standoff 2.39 2.31 2.24 .094 .091 .088 a2 molded package thickness 2.64 2.50 2.36 .104 .099 .093 a overall height 1.27 .050 p pitch 18 18 n number of pins max nom min max nom min dimension limits millimeters inches* units l c h 45 1 2 d p n b e1 e a2 a1 a * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-013 drawing no. c04-051 significant characteristic
MCP2140 ds21790a-page 44 preliminary ? 2003 microchip technology inc. 20-lead plastic shrink small outline (ss) ? 209 mil, 5.30 mm (ssop) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.38 0.32 0.25 .015 .013 .010 b lead width 203.20 101.60 0.00 8 4 0 foot angle 0.25 0.18 0.10 .010 .007 .004 c lead thickness 0.94 0.75 0.56 .037 .030 .022 l foot length 7.34 7.20 7.06 .289 .284 .278 d overall length 5.38 5.25 5.11 .212 .207 .201 e1 molded package width 8.18 7.85 7.59 .322 .309 .299 e overall width 0.25 0.15 0.05 .010 .006 .002 a1 standoff 1.83 1.73 1.63 .072 .068 .064 a2 molded package thickness 1.98 1.85 1.73 .078 .073 .068 a overall height 0.65 .026 p pitch 20 20 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d p n b e e1 l c a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: mo-150 drawing no. c04-072 significant characteristic
? 2003 microchip technology inc. preliminary ds21790a-page 45 MCP2140 appendix a: revision history revision a ? this is a new data sheet appendix b: network layering reference model figure b-1 shows the iso network layering reference model. the shaded areas are implemented by the MCP2140, while the cross-hatched area is imple- mented by an infrared transceiver. the unshaded areas should be implemented by the host controller. figure b-1: iso reference layer model osi reference layers application presentation session transport network data link layer llc (logical link control) acceptance filtering overload notification recovery management mac (medium access control) data encapsulation/decapsulation frame coding (stuffing, destuffing) medium access management error detection error signalling acknowledgment serialization/deserialization physical layer pls (physical signalling) bit encoding/decoding bit timing synchronization pma (physical medium attachment) driver/receiver characteristics mdi (medium dependent interface) connectors fault confinement (mac-lme) bus failure management (pls-lme) supervisor regions implemented by the MCP2140 has to be implemented in host controller firmware regions implemented by the optical transceiver logic (such as a picmicro ? microcontroller)
MCP2140 ds21790a-page 46 preliminary ? 2003 microchip technology inc. the irda standard specifies the following protocols: ? physical signaling layer (phy) ? link access protocol (irlap) ? link management protocol/information access service (irlmp/ias) the irda data lists optional protocols. they are: ?tiny tp ? irtran-p ? irobex ?irlan ?ircomm ?irmc ?irda lite figure b-2 shows the irda data protocol stack and which components are implemented by the MCP2140. figure b-2: irda data - protocol stacks b.1 irda standard data protocols supported by MCP2140 the MCP2140 supports these required irda standard protocols: ? physical signaling layer (phy) ? link access protocol (irlap) ? link management protocol/information access service (irlmp/ias) the MCP2140 also supports some of the optional pro- tocols for irda data. the optional protocols that the MCP2140 implements are: ?tiny tp ?ircomm b.1.1 physical signal layer (phy) the MCP2140 provides the following physical signal layer specification support: ? bidirectional communication ? data packets are protected by a crc - 16-bit crc for speeds up to 115.2 kbaud ? data communication rate - 9600 baud minimum data rate (with primary speed/cost steps of 115.2 kbaud the following physical layer specification is depen- dant on the optical transceiver logic used in the application. the specification states: ? communication range, which sets the end user expectation for discovery, recognition and performance. - continuous operation from contact to at least 1 meter (typically 2 meters can be reached) - a low power specification reduces the objec- tive for operation from contact to at least 20 cm (low power and low power) or 30 cm (low power and standard power) ircomm (1) ir link management - mux (irlmp) ir link access protocol (irlap) optional irda data protocols not supported by the MCP2140 supported by the MCP2140 irtran-p irobex irlan irmc lm-ias tiny transport protocol (tiny tp) synchronous 4 ppm (4 mb/s) synchronous serial ir (1.152 mb/s) asynchronous serial ir (2, 3) (9600 -115200 b/s) note 1: the MCP2140 implements the 9-wire ?cooked? service class serial replicator. 2: the MCP2140 is fixed at 9600 baud. 3: an optical transceiver is required. note: MCP2140 supports 9600 baud only. note: MCP2140 supports 9600 baud only.
? 2003 microchip technology inc. preliminary ds21790a-page 47 MCP2140 b.1.2 irlap the irlap protocol provides: ? management of communication processes on the link between devices ? a device-to-device connection for the reliable, ordered transfer of data ? device discover procedures ? hidden node handling. 115.2 kbaud figure b-3 identifies the key parts and hierarchy of the irda protocols. the bottom layer is the physical layer, irphy. this is the part that converts the serial data to and from pulses of ir light. ir transceivers can?t trans- mit and receive at the same time. the receiver has to wait for the transmitter to finish sending. this is some- times referred to as a ?half-duplex? connection. the ir link access protocol (irlap) provides the structure for packets (or ?frames?) of data to emulate data that would normally be free to stream back and forth. figure b-3: irda standard protocol layers figure b-4 shows how the irlap frame is organized. the frame is preceded by some number of beginning of frame characters (bofs). the value of the bof is generally 0xc0, but 0xff may be used if the last bof character is a 0xc0. the purpose of multiple bofs is to give the other station some warning that a frame is coming. the irlap frame begins with an address byte (?a? field), then a control byte (?c? field). the control byte is used to differentiate between different types of frames and is also used to count frames. frames can carry sta- tus, data or commands. the irlap protocol has a com- mand syntax of it?s own. these commands are part of the control byte. lastly, irlap frames carry data. this data is the information (or ?i?) field. the integrity of the frame is ensured with a 16-bit crc, referred to as the frame check sequence (fcs). the 16-bit crc value is transmitted lsb first. the end of the frame is marked with an eof character, which is always a 0xc1. the frame structure described here is used for all versions of irda protocols used for serial wire replacement for speeds up to 115.2 kbaud. figure b-4: irlap frame in addition to defining the frame structure, irlap pro- vides the ?housekeeping? functions of opening, closing and maintaining connections. the critical parameters that determine the performance of the link are part of this function. these parameters control how many bofs are used, identify the speed of the link, how fast either party may change from receiving to transmitting, etc. irlap has the responsibility of negotiating these parameters to the highest common set so that both sides can communicate as quickly and reliably as possible. note: not supported by MCP2140. host o.s. or application ircomm irlap irphy protocols resident in MCP2140 ir pulses transmitted and received irlmp ? ias note 1: the MCP2140 only supports communication baud rate of 9600 baud. 2: another irda standard that is entering into general usage is ir object exchange (irobex). this standard is not used for serial connection emulation. 3: irda communication standards faster than 115.2 kbaud use a different crc method and physical layer. x bofs bof a c fcs i eof (1+n) of c0h payload 2 bytes c1h
MCP2140 ds21790a-page 48 preliminary ? 2003 microchip technology inc. b.1.3 irlmp the irlmp protocol provides: ? multiplexing of the irlap layer. this allows multiple channels above an irlap connection. ? protocol and service discovery. this is accomplished via the information access service (ias). when two devices that contain the irda standard fea- ture are connected, there is generally one device that has something to do and the other device that has the resource to do it. for example, a laptop may have a job to print and an irda standard compatible printer has the resources to print it. in irda standard terminology, the laptop is a primary device and the printer is the sec- ondary device. when these two devices connect, the primary device must determine the capabilities of the secondary device to determine if the secondary device is capable of doing the job. this determination is made by the primary device asking the secondary device a series of questions. depending on the answers to these questions, the primary device may or may not elect to connect to the secondary device. the queries from the primary device are carried to the secondary device using irlmp. the responses to these queries can be found in the information access service (ias) of the secondary device. the ias is a list of the resources of the secondary device. the primary device compares the ias responses with its require- ments and then makes the decision if a connection should be made. b.1.4 link management - information access service (lm-ias) each lm-ias entity maintains an information database to provide: ? information on services for other devices that contain the irda standard feature (discovery) ? information on services for the device itself ? remote accessing of another device?s information base this is required so that clients on a remote device can find configuration information needed to access a service. b.1.5 tiny tp tiny tp provides the flow control on irlmp connec- tions. an optional service of segmentation and reassembly can be handled. b.1.6 ircomm ircomm provides the method to support serial and par- allel port emulation. this is useful for legacy com applications, such as printers and modem devices. the ircomm standard is a syntax that allows the pri- mary device to consider the secondary device a serial device. ircomm allows for emulation of serial or parallel (printer) connections of various capabilities. figure b-5: ircomm service classes note: the MCP2140 supports the 9-wire ?cooked? service class of ircomm. other service classes supported by ircomm are shown in figure b-5 . ircomm services uncooked services cooked services parallel serial irlpt 3-wire raw parallel centronics ieee 1284 serial 3-wire cooked 9-wire cooked supported by MCP2140
? 2003 microchip technology inc. preliminary ds21790a-page 49 MCP2140 b.1.7 other optional irda data protocols other irda data protocols have been developed to spe- cific application requirements. these irda data proto- cols are briefly described in the following subsections. for additional information, please refer to the irda web site (www.irda.org) . b.1.7.1 irtran-p irtran-p provides the protocol to exchange images with digital image capture devices/cameras. b.1.7.2 irobex irobex provides object exchange services. this is similar to http. b.1.7.3 irlan irlan describes a protocol to support ir wireless access to a local area network (lan). b.1.7.4 irmc irmc describes how mobile telephony and communica- tion devices can exchange information. this informa- tion includes phone book, calender and message data. also how call control and real-time voice are handled (rtcon). b.1.7.5 irda lite irda lite describes how to reduce the application code requirements, while maintaining compatibility with the full implementation. note: not supported by MCP2140. note: not supported by MCP2140. note: not supported by MCP2140. note: not supported by MCP2140. note: not supported by MCP2140.
MCP2140 ds21790a-page 50 preliminary ? 2003 microchip technology inc. appendix c: how devices connect when two devices implementing the irda standard fea- ture establish a connection using the ircomm protocol, the process is analogous to connecting two devices with serial ports using a cable. this is referred to as a ?point-to-point? connection. this connection is limited to half-duplex operation because the ir transceiver cannot transmit and receive at the same time. the pur- pose of the irda protocols is to allow this half-duplex link to emulate, as much as possible, a full-duplex con- nection. in general, this is done by dividing the data into ?packets?, or groups of data. these packets can then be sent back and forth, when needed, without risk of collision. the rules of how and when these packets are sent constitute the irda protocols. when a wired connection is used, the assumption is made that both sides have the same communications parameters and features. a wired connection has no need to identify the other connector because it is assumed that the connectors are properly connected. in the irda standard, a connection process has been defined to identify other irda compatible devices and establish a communication link. there are three steps that these two devices go through to make this connection. they are: ? normal disconnect mode (ndm) ? discovery mode ? normal connect mode (ncm) figure c-1 shows the connection sequence. c.1 normal disconnect mode (ndm) when two irda standard compatible devices come into range they must first recognize each other. the basis of this process is that one device has some task to accomplish and the other device has a resource needed to accomplish this task. one device is referred to as a primary device and the other is referred to as a secondary device. this distinction between primary device and secondary device is important. it is the responsibility of the primary device to provide the mechanism to recognize other devices. so the primary device must first poll for nearby irda standard compat- ible devices. during this polling, the default baud rate of 9600 baud is used by both devices. for example, if you want to print from an irda equipped laptop to an irda printer, utilizing the irda standard fea- ture, you would first bring your laptop in range of the printer. in this case, the laptop is the one that has something to do and the printer has the resource to do it. the laptop is called the primary device and the printer is the secondary device. some data-capable cell phones have irda standard infrared ports. if you used such a cell phone with a personal digital assis- tant (pda), the pda that supports the irda standard feature would be the primary device and the cell phone would be the secondary device. when a primary device polls for another device, a nearby secondary device may respond. when a sec- ondary device responds, the two devices are defined to be in the normal disconnect mode (ndm) state. ndm is established by the primary device broadcasting a packet and waiting for a response. these broadcast packets are numbered. usually 6 or 8 packets are sent. the first packet is number 0, the last packet is usually number 5 or 7. once all the packets are sent, the pri- mary device sends an id packet, which is not num- bered. the secondary device waits for these packets and then responds to one of the packets. the packet responds to determines the ?timeslot? to be used by the second- ary device. for example, if the secondary device responds after packet number 2, then the secondary device will use timeslot 2. if the secondary device responds after packet number 0, then the secondary device will use timeslot 0. this mechanism allows the primary device to recognize as many nearby devices as there are timeslots. the primary device will continue to generate timeslots and the secondary device should continue to respond, even if there?s nothing to do. note 1: the MCP2140 can only be used to implement a secondary device. 2: the MCP2140 supports a system with only one secondary device having exclu- sive use of the irda standard infrared link (known as ?point-to-point? communica- tion). 3: the MCP2140 always responds to packet number 2. this means that the MCP2140 will always use timeslot 2. 4: if another secondary device is nearby, the primary device may fail to recognize the MCP2140, or the primary device may not recognize either of the devices.
? 2003 microchip technology inc. preliminary ds21790a-page 51 MCP2140 c.2 discovery mode discovery mode allows the primary device to deter- mine the capabilities of the MCP2140 (secondary device). discovery mode is entered once the MCP2140 (secondary device) has sent an xid response to the primary device and the primary device has completed sending the xids and then sends a broadcast id. if this sequence is not completed, then a primary and secondary device can stay in ndm indefinitely. when the primary device has something to do, it initiates discovery. discovery has two parts. they are: ? link initialization ? resource determination the first step is for the primary and secondary devices to determine, and then adjust to, each other?s hardware capabilities. these capabilities are parameters like: ? data rate ? turn around time ? number of packets without a response ? how long to wait before disconnecting both the primary and secondary device begin commu- nications at 9600 baud, which is the default baud rate. the primary device sends its parameters, then the secondary device responds with its parameters. for example, if the primary supports all data rates up to 115.2 kbaud and the secondary device only supports 9.6 kbaud, the link will be established at 9.6 kbaud. once the hardware parameters are established, the primary device must determine if the secondary device has the resources it requires. if the primary device has a job to print, then it must know if it?s talking to a printer, not a modem or other device. this determination is made using the information access service (ias). the job of the secondary device is to respond to ias que- ries made by the primary device. the primary device must ask a series of questions like: ? what is the name of your service? ? what is the address of this service? ? what are the capabilities of this device? when all the primary device?s questions are answered, the primary device can access the service provided by the secondary device. c.3 normal connect mode (ncm) once discovery has been completed, the primary device and secondary device can freely exchange data. both the primary device and the secondary device check to make sure that data packets are received by the other without errors. even when data is required to be sent, the primary and secondary devices will still exchange packets to ensure that the connection hasn?t, unexpectedly, been dropped. when the primary device has finished, it then transmits the close link command to the secondary device. the secondary device will confirm the close link command and both the primary device and the secondary device will revert to the ndm state. note: the MCP2140 is limited to a data rate of 9.6 kbaud. note: if the ncm mode is unexpectedly termi- nated for any reason (including the primary device not issuing a close link command), the secondary device will revert to the ndm state after a time delay (after the last frame has been received).
MCP2140 ds21790a-page 52 preliminary ? 2003 microchip technology inc. figure c-1: high level ircomm connection sequence normal disconnect mode (ndm) send xid commands (timeslots n, n+1, ...) no response xid response in timeslot y, finish sending xids (max timeslots - y frames) broadcast id no response to these xids claiming this timeslot, ( MCP2140 no response to broadcast id primary device (MCP2140) discovery normal response mode (nrm) send snrm command (w/ parameters and connection address) open channel for ias queries send ias queries open channel for data send data or status shutdown link ua response with parameters using connect address confirm channel open for ias provide ias responses confirm channel open for data send data or status confirm shutdown (back to ndm state) (approximately 70ms between xid commands) send data or status send data or status ( MCP2140 dsr pin driven low) secondary device always claims timeslot 0)
? 2003 microchip technology inc. preliminary ds21790a-page 53 MCP2140 appendix d: db-9 pin information table d-1 shows the db-9 pin information and the direction of the MCP2140 signals. the MCP2140 is designed for use in data communications equipment (dce) applications. table d-1: db-9 signal information appendix e: know primary device compatibility issues table e-1 show the known issues of primary devices interfacing to the MCP2140. table e-1: primary device issues db-9 pin no. signal direction comment 1 cd hc MCP2140 carrier detect 2 rx MCP2140 hc received data 3 tx hc MCP2140 transmit data 4 dtr hc MCP2140 data terminal ready 5 gnd ? ground 6 dsr MCP2140 hc data set ready 7 rts hc MCP2140 request to send 8 cts MCP2140 hc clear to send 9 ri hc MCP2140 ring indicator legend: hc = host controller primary device operating system issue result hp jornada 720 hpc pro/windows ce? 3.0 (pocket pc) jornada 720 transmits 0xff (not 0xc0) for extra sof (start-of- frame) characters during ndm. MCP2140 will not connect to the jornada 720. personal computers windows ? 2000 (do not have list of which versions) the operating system will reset if an ir device id of ?null? is received. MCP2140 will not connect to the pc
MCP2140 ds21790a-page 54 preliminary ? 2003 microchip technology inc. notes:
? 2003 microchip technology inc. preliminary ds21790a-page 55 MCP2140 product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office . sales and support data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products. part no. x /xx package temperature range device device MCP2140: infrared communications controller MCP2140t: infrared communications controller (tape and reel) temperature range i = -40c to +85c package p = plastic dip (300 mil, body), 18-lead so = plastic soic (300 mil, body), 18-lead ss = plastic ssop (209 mil, body), 20-lead examples: a) MCP2140-i/p = industrial temp., pdip packaging b) MCP2140-i/so = industrial temp., soic package c) MCP2140t-i/ss = tape and reel, industrial temp., ssop package
MCP2140 ds21790a-page 56 preliminary ? 2003 microchip technology inc. notes:
? 2003 microchip technology inc. preliminary ds21790a - page 57 information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchip?s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, k ee l oq , mplab, pic, picmicro, picstart, pro mate and powersmart are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, micro id , mxdev, mxlab, picmaster, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. accuron, application maestro, dspic, dspicdem, dspicdem.net, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microport, migratable memory, mpasm, mplib, mplink, mpsim, picc, pickit, picdem, picdem.net, powercal, powerinfo, powermate, powertool, rflab, rfpic, select mode, smartsensor, smartshunt, smarttel and total endurance are trademarks of microchip technology incorporated in the u.s.a. and other countries. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2003, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999 and mountain view, california in march 2002. the company?s quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, non-volatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001 certified. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification contained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specifications contained in microchip's data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconductor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that ac t.
ds21790a-page 58 preliminary ? 2003 microchip technology inc. m americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com atlanta 3780 mansell road, suite 130 alpharetta, ga 30022 tel: 770-640-0034 fax: 770-640-0307 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 detroit tri-atria office building 32255 northwestern highway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 kokomo 2767 s. albright road kokomo, indiana 46902 tel: 765-864-8360 fax: 765-864-8387 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 phoenix 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7966 fax: 480-792-4338 san jose microchip technology inc. 2107 north first street, suite 590 san jose, ca 95131 tel: 408-436-7950 fax: 408-436-7955 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia microchip technology australia pty ltd marketing support division suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing microchip technology consulting (shanghai) co., ltd., beijing liaison office unit 915 bei hai wan tai bldg. no. 6 chaoyangmen beidajie beijing, 100027, no. china tel: 86-10-85282100 fax: 86-10-85282104 china - chengdu microchip technology consulting (shanghai) co., ltd., chengdu liaison office rm. 2401-2402, 24th floor, ming xing financial tower no. 88 tidu street chengdu 610016, china tel: 86-28-86766200 fax: 86-28-86766599 china - fuzhou microchip technology consulting (shanghai) co., ltd., fuzhou liaison office unit 28f, world trade plaza no. 71 wusi road fuzhou 350001, china tel: 86-591-7503506 fax: 86-591-7503521 china - hong kong sar microchip technology hongkong ltd. unit 901-6, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 china - shanghai microchip technology consulting (shanghai) co., ltd. room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 china - shenzhen microchip technology consulting (shanghai) co., ltd., shenzhen liaison office rm. 1812, 18/f, building a, united plaza no. 5022 binhe road, futian district shenzhen 518033, china tel: 86-755-82901380 fax: 86-755-82966626 china - qingdao rm. b505a, fullhope plaza, no. 12 hong kong central rd. qingdao 266071, china tel: 86-532-5027355 fax: 86-532-5027205 india microchip technology inc. india liaison office marketing support division divyasree chambers 1 floor, wing a (a3/a4) no. 11, o?shaugnessey road bangalore, 560 025, india tel: 91-80-2290061 fax: 91-80-2290062 japan microchip technology japan k.k. benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 korea microchip technology korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea 135-882 tel: 82-2-554-7200 fax: 82-2-558-5934 singapore microchip technology singapore pte ltd. 200 middle road #07-02 prime centre singapore, 188980 tel: 65-6334-8870 fax: 65-6334-8850 ta iw a n microchip technology (barbados) inc., taiwan branch 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe austria microchip technology austria gmbh durisolstrasse 2 a-4600 wels austria tel: 43-7242-2244-399 fax: 43-7242-2244-393 denmark microchip technology nordic aps regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45 4420 9895 fax: 45 4420 9910 france microchip technology sarl parc d?activite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany microchip technology gmbh steinheilstrasse 10 d-85737 ismaning, germany tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy microchip technology srl via quasimodo, 12 20025 legnano (mi) milan, italy tel: 39-0331-742611 fax: 39-0331-466781 united kingdom microchip ltd. 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44 118 921 5869 fax: 44-118 921-5820 03/25/03 w orldwide s ales and s ervice

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